Embedded real-time software construction has usually posed interesting challenges due to the complexity of the tasks executed. Most methods are either hard to scale up for large systems, or require a difficult testing effort with no guarantee for bug-free software products. Formal methods have showed promising results; nevertheless, they are difficult to apply when the complexity of the system under development scales up. Instead, systems engineers have often relied on the use of modeling and simulation (M&S) techniques in order to make system development tasks manageable. Construction of system models and their analysis through simulation re¬duces both end costs and risks, while enhancing system capabilities and improving the quality of the final products. M&S let users experiment with “virtual” sys¬tems, allowing them to explore changes, and test dynamic conditions in a risk-free environment. This is a useful approach, moreover considering that testing under actual operating conditions may be impractical and in some cases impossible.

In this seminar, we will present a Model-Driven framework to develop embedded systems based on the DEVS (Discrete Event systems Specification) formalism. DEVS provides a formal foundation to M&S that proved to be successful in different complex systems. This approach combines the advantages of a simulation-based approach with the rigor of a formal methodology. Another advantage of using DEVS is that different existing techniques (Bond Graphs, Cellular Automata, Partial Differential Equations, Queuing models, etc.) have been successfully transformed into DEVS models. We will discuss how to use this framework to incrementally develop embedded applications, and to seamlessly integrate simulation models with hardware components. Our approach does not impose any order in the deployment of the actual hardware components, providing flexibility to the overall process. The use of DEVS improves reliability (in terms of logical correctness and timing), enables model reuse, and permits reducing development and testing times for the overall process. Consequently, the development cycle is shortened, its cost reduced, and quality and reliability of the final product is improved.

The following topics will be covered:

1. An introduction to a Modeling and Simulation Framework for development and testing of embedded systems, including a method to transformation DEVS and Timed Automata models
2. A description of Embedded DEVS models in E-CD++
3. An example of utilization of the methodology in robotics and networking systems

Gabriel A. Wainer (SMSCS, SMIEEE) received the M.Sc. (1993) and Ph.D. degrees (1998, with highest honors) at the University of Buenos Aires (UBA), Argentina, and Université d’Aix-Marseille III, France. After being Assistant Professor at the Computer Science Department of UBA, in July 2000 he joined the Department of Systems and Computer Engineering at Carleton University, where he is now an Associate Professor. He has been a visiting scholar at ACIMS (The University of Arizona); LSIS (CNRS), and INRIA (Sophia-Antipolis), France. He has been invited professor at the UCM, UPC (Spain), Université Paul Cézanne, Université de Nice, France. He is the author of three books and over 260 research papers; he edited nine other books, and helped organizing over 120 conferences, including being one of the founders of SIMUTools, SimAUD and the Symposium of Theory of Modeling and Simulation. Prof. Wainer is the Vice-President Publications, and was a member of the Board of Directors of the SCS. He is Special Issues Editor of SIMULATION, member of the Editorial Board of Wireless Networks (Elsevier), Journal of Defense Modeling and Simulation, and International Journal of Simulation and Process Modelling (Inderscience). He is the head of the Advanced Real-Time Simulation lab, located at Carleton Uni-versity's Centre for advanced Simulation and Visualization (V-Sim). He has been the recipient of various awards, including the IBM Eclipse Innovation Award, SCS Leadership Award, and various Best Paper awards. He has been awarded Carleton University's Research Achievement Award (2005-2006), the First Bernard P. Zeigler DEVS Modeling and Simulation Award, and the SCS Outstanding Professional Award (2011). Further information can be found at http://www.sce.carleton.ca/faculty/wainer.