Abstract:
One major obstacle faced by designers when entering the multicore era is how toharness the massive computing power which these cores provide. Since Instructional-Level Parallelism (ILP) is inherently limited, one single thread is not capable of efficiently utilizing the resource of a single core. Hence, Simultaneous MultiThreading (SMT) microarchitecture can be introduced in an effort to achieve improved system resource utilization and a correspondingly higher instruction throughput through the exploitation of Thread-LevelParallelism (TLP) as well as ILP. However, when multiple threads execute concurrently in a single core, they automatically compete for system resources. Our research shows that, without control over the number of entries each thread can occupy in system resources like instruction fetch queue and/or reorderbuffer, a scenario called "mutual-hindrance" execution takes place. Conversely, introducing active resource sharing control mechanisms causes the opposite situation ("mutual-benefit" execution), with a possible significant performance improvement and lower cache miss frequency. This demonstrates that active resource sharing control is essential for future multicore multithreading microprocessor design.

Biography:
Dr. Chen Liu is currently an assistant professor in the Department of Electrical and Computer Engineering at Florida International University. Dr.Liu received the B.E. degree in Electrical and Information Engineering from University of Science and Technology of China, Hefei, Anhui, China in 2000, the M.S. degree in Electrical Engineering from the University of California, Riverside in 2002 and the Ph.D. degree in Electrical and Computer Engineering from the University of California, Irvine in 2008, respectively. Dr. Liu'sresearch interests include general-purpose micro-processor design, multi-core,multi-threading architecture and high-performance computing. He is a member of IEEE, ACM, and ASEE.