University of California, Los Angeles
Dr. Willson is the Charles P. Reames Professor Emeritus in the UCLA EE Department. He received the B.E.E. from Georgia Tech in 1961, the M.S. and Ph.D. from Syracuse Univ. in 1965 and 1967. From 1961 to 1964 he was with IBM, Poughkeepsie, NY, and from 1967 to 1973 he was a researcher at Bell Laboratories in Murray Hill, NJ. He joined the UCLA faculty in 1973. In 1991 he founded Pentomics, Inc. He is the Editor of Nonlinear Networks: Theory and Analysis (IEEE Press, 1974). His research interests span the fields of Circuits and Signal Processing. He is a former Editor-in Chief of the IEEE Transactions on Circuits and Systems, a former President of the IEEE Circuits and Systems Society, and member of Eta Kappa Nu, Tau Beta Pi and the National Academy of Engineering. During his 40 years on the UCLA faculty he has produced 34 Ph.D. graduates and he has received numerous research-related awards from the IEEE Circuits and Systems Society, and (with former Ph.D. students) he twice (1982 an 1994) received the IEEE W.R.G. Baker Award of the IEEE (for the best paper published in all IEEE Transactions, Journals, and Magazines). His teaching-related awards include the 1982 George Westinghouse Award of the ASEE, the 1982 Distinguished Faculty Award of the UCLA Engineering Alumni Association, the 2010 IEEE Leon K. Kirchmayer Graduate Teaching Award, the 2013 Lockheed-Martin Award for Excellence in Teaching, the 2014 IEEE HKN Distinguished Service Award, and the 2015 John J. Guarrera, Engineering Educator of the Year Award, of the Engineers Council.
This talk provides essential information on direct digital synthesizers (DDS)–also known as DDFS and numerically controlled oscillators (NCO). We begin with “What’s a DDS?” and “Why is it interesting?” and then move into “How does it work?” and “How is DDS-quality assessed?” These questions lead us to “What’s the state-of-the-art?” and a discussion of some of the most recent “breakthrough” DDS research results, including the speaker’s newest DDS architecture, which is shown to improve DDS output quality while simultaneously reducing the computations needed to generate each DDS output value (yielding DDS circuits with lower power consumption and smaller chip area) and finally a first-ever better alternative to phase-accumulator pipelining, which is the commonly used technique for increasing DDS operating speed.